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1

High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications

Athanasios P. Kakarountas, Haralambos Michail, Athanasios Milidonis, Costas E. Goutis, George Theodoridis

Journal:

The Journal of Supercomputing

Year:

2006

Language:

english

File:

PDF, 480 KB

english, 2006

2

A methodology for speeding up loop kernels by exploiting the software information and the memory architecture

Kelefouras, Vasilios, Kritikakou, Angeliki, Goutis, Costas

Journal:

Computer Languages, Systems & Structures

Year:

2015

Language:

english

File:

PDF, 4.15 MB

english, 2015

3

Efficient high-performance implementation of JPEG-LS encoder

Markos E. Papadonikolakis, Athanasios P. Kakarountas, Costas E. Goutis

Journal:

Journal of Real-Time Image Processing

Year:

2008

Language:

english

File:

PDF, 350 KB

english, 2008

4

A systematic approach to classify design-time global scheduling techniques

Kritikakou, Angeliki, Catthoor, Francky, Kelefouras, Vasilios, Goutis, Costas

Journal:

ACM Computing Surveys

Year:

2013

Language:

english

File:

PDF, 479 KB

english, 2013

5

On the computation of the prime factor DST

Anna Tatsaki, Chrissavgi Dre, Thanos Stouraitis, Costas Goutis

Journal:

Signal Processing

Year:

1995

Language:

english

File:

PDF, 478 KB

english, 1995

6

A DSP processor with a powerful set of elementary arithmetic operations based on cordic and CCM algorithms

Dimitris E Metafas, Costas E Goutis

Journal:

Microprocessing and Microprogramming

Year:

1990

Language:

english

File:

PDF, 355 KB

english, 1990

7

A bit-serial VLSI architecture for the 2-D discrete cosine transform

Anna Tatsaki, Costas Goutis

Journal:

Microprocessing and Microprogramming

Year:

1994

Language:

english

File:

PDF, 887 KB

english, 1994

8

Image coding using vector quantization of wavelet coefficients

Chrissavgi Dre, George Branis, Costas Goutis

Journal:

Microprocessing and Microprogramming

Year:

1994

Language:

english

File:

PDF, 270 KB

english, 1994

9

Resource aware mapping on coarse grained reconfigurable arrays

Grigorios Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis

Journal:

Microprocessors and Microsystems

Year:

2009

Language:

english

File:

PDF, 1.22 MB

english, 2009

10

A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems

Michalis D. Galanis, Athanassios Milidonis, Athanassios P. Kakarountas, Costas E. Goutis

Journal:

Microelectronics Journal

Year:

2006

Language:

english

File:

PDF, 533 KB

english, 2006

11

Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path

Michalis D. Galanis, Costas E. Goutis

Journal:

Journal of Systems Architecture

Year:

2008

Language:

english

File:

PDF, 255 KB

english, 2008

12

Mapping iterative algorithims on regular processor arrays without using uniform recurrent equations

Dimitrios J. Soudris, Michael K. Birbas, Costas E. Goutis

Journal:

Microprocessing and Microprogramming

Year:

1991

Language:

english

File:

PDF, 349 KB

english, 1991

13

Test for batch-to-batch variation in stability analysis

Costas Goutis, Tom Fearn, Shein-Chung Chow, Jun Shao

Journal:

Statistics in Medicine

Year:

1992

Language:

english

File:

PDF, 108 KB

english, 1992

14

A method for partitioning applications in hybrid reconfigurable architectures

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Costas E. Goutis

Journal:

Design Automation for Embedded Systems

Year:

2005

Language:

english

File:

PDF, 477 KB

english, 2005

15

Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs

Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis

Journal:

The Journal of Supercomputing

Year:

2006

Language:

english

File:

PDF, 266 KB

english, 2006

16

Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture

Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis

Journal:

The Journal of Supercomputing

Year:

2007

Language:

english

File:

PDF, 1.04 MB

english, 2007

17

Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path

Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis

Journal:

The Journal of Supercomputing

Year:

2007

Language:

english

File:

PDF, 609 KB

english, 2007

18

Partitioning Methodology for Heterogeneous Reconfigurable Functional Units

Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis

Journal:

The Journal of Supercomputing

Year:

2006

Language:

english

File:

PDF, 363 KB

english, 2006

19

Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays

Grigorios Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis

Journal:

The Journal of Supercomputing

Year:

2009

Language:

english

File:

PDF, 4.25 MB

english, 2009

20

A data locality methodology for matrix–matrix multiplication algorithm

Nicolaos Alachiotis, Vasileios I. Kelefouras, George S. Athanasiou, Harris E. Michail, Angeliki S. Kritikakou, Costas E. Goutis

Journal:

The Journal of Supercomputing

Year:

2012

Language:

english

File:

PDF, 1.78 MB

english, 2012

21

Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path

Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis

Journal:

Journal of Signal Processing Systems

Year:

2008

Language:

english

File:

PDF, 473 KB

english, 2008

22

Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy

Athanasios Milidonis, Nikolaos Alachiotis, Vasileios Porpodas, Harris Michail, Georgios Panagiotakopoulos, Athanasios P. Kakarountas, Costas E. Goutis

Journal:

Journal of Signal Processing Systems

Year:

2010

Language:

english

File:

PDF, 317 KB

english, 2010

23

A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices

Kelefouras, Vasilios I., Kritikakou, Angeliki S., Siourounis, Konstantinos, Goutis, Costas E.

Journal:

Journal of Signal Processing Systems

Year:

2014

Language:

english

File:

PDF, 1.05 MB

english, 2014

24

A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization

Kelefouras, Vasilios I., Athanasiou, George S., Alachiotis, Nikolaos, Michail, Harris E., Kritikakou, Angeliki S., Goutis, Costas E.

Journal:

IEEE Transactions on Signal Processing

Year:

2011

Language:

english

File:

PDF, 957 KB

english, 2011

25

A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD

Kelefouras, Vasilios, Kritikakou, Angeliki, Goutis, Costas

Journal:

The Journal of Supercomputing

Year:

2014

Language:

english

File:

PDF, 859 KB

english, 2014

26

A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization

Kelefouras, Vasilios, Kritikakou, Angeliki, Goutis, Costas

Journal:

The Journal of Supercomputing

Year:

2014

Language:

english

File:

PDF, 1.63 MB

english, 2014

27

[IEEE 2008 International Symposium on System-on-Chip (SOC) - Tampere, Finland (2008.11.5-2008.11.6)] 2008 International Symposium on System-on-Chip - Integrating high speed multipliers in Coarse Grain Reconfigurable Arrays

Georgiopoulos, Stavros, Dimitroulakos, Grigoris, Goutis, Costas E.

Year:

2008

Language:

english

File:

PDF, 398 KB

english, 2008

28

[IEEE 2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII) - Samos, Greece (2012.07.16-2012.07.19)] 2012 International Conference on Embedded Computer Systems (SAMOS) - A template-based methodology for efficient microprocessor and FPGA accelerator co-design

Kritikakou, Angeliki, Catthoor, Francky, Athanasiou, George S., Kelefouras, Vasilios, Goutis, Costas

Year:

2012

Language:

english

File:

PDF, 1.06 MB

english, 2012

29

Efficient bit-serial VLSI implementation of the 4 × 4-point discrete cosine transform

TATSAKI, ANNA, BUREKAS, BOB, GOUTIS, COSTAS

Journal:

International Journal of Electronics

Year:

1994

Language:

english

File:

PDF, 183 KB

english, 1994

30

[IEEE 2010 Fifth International Conference on Digital Telecommunications (ICDT) - Athens, TBD, Greece (2010.06.13-2010.06.19)] 2010 Fifth International Conference on Digital Telecommunications - HW/SW Co-design Integrating High-Speed Authentication Module for IPSec/IPv6

Michail, Harris, Gregoriades, Andreas, Kelefouras, Vassilis, Kotsiolis, Apostolis, Papagianopoulou, Dimitra, Goutis, Costas

Year:

2010

Language:

english

File:

PDF, 401 KB

english, 2010

31

[IEEE 2010 17th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2010) - Athens, Greece (2010.12.12-2010.12.15)] 2010 17th IEEE International Conference on Electronics, Circuits and Systems - Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor

Michail, Harris E., Athanasiou, George S., Makridakis, George, Goutis, Costas E.

Year:

2010

Language:

english

File:

PDF, 977 KB

english, 2010

32

Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System

Galanis, Michalis D., Dimitroulakos, Gregory, Goutis, Costas E.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2007

Language:

english

File:

PDF, 435 KB

english, 2007

33

[IEEE 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Rabat, Morocco (2007.09.2-2007.09.5)] 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Integration of a concurrent signature monitoring mechanism in a System-on-a-Chip

Kakarountas, Athanasios, Michail, Haralambos, Goutis, Costas E.

Year:

2007

Language:

english

File:

PDF, 411 KB

english, 2007

34

[IEEE 2007 IEEE International Parallel and Distributed Processing Symposium - Long Beach, CA, USA (2007.03.26-2007.03.30)] 2007 IEEE International Parallel and Distributed Processing Symposium - Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path

Galanis, Michalis D., Dimitroulakos, Gregory, Goutis, Costas E.

Year:

2007

Language:

english

File:

PDF, 211 KB

english, 2007

35

[IEEE 2006 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation - Samos (2006.07.17-2006.07.20)] 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation - Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path

Galanis, Michalis, Dimitroulakos, Gregory, Goutis, Costas

Year:

2006

Language:

english

File:

PDF, 170 KB

english, 2006

36

Letter to the Editors

Tom Fearn, Costas Goutis, Jun Shao and Shein-Chung Chow

Journal:

Journal of the Royal Statistical Society: Series C (Applied Statistics)

Year:

1993

Language:

english

File:

PDF, 272 KB

english, 1993

37

Optimising the SHA-512 cryptographic hash function on FPGAs

Goutis, Costas E., Theodoridis, George, Michail, Harris E., Athanasiou, George S.

Journal:

IET Computers & Digital Techniques

Year:

2013

Language:

english

File:

PDF, 1.15 MB

english, 2013

38

High-performance FPGA implementations of the cryptographic hash function JH

Theodoridis, George, Athanasiou, George S., Goutis, Costas E., Michail, Harris E.

Journal:

IET Computers & Digital Techniques

Year:

2013

Language:

english

File:

PDF, 823 KB

english, 2013

39

CIPHER BLOCK BASED AUTHENTICATION MODULE: A HARDWARE DESIGN PERSPECTIVE

MICHAIL, HARRIS E., SCHINIANAKIS, DIMITRIOS, GOUTIS, COSTAS E., KAKAROUNTAS, ATHANASIOS P., SELIMIS, GEORGIOS

Journal:

Journal of Circuits System and Computers

Year:

2011

Language:

english

File:

PDF, 199 KB

english, 2011

40

A SYSTEMATIC FLOW FOR DEVELOPING TOTALLY SELF-CHECKING ARCHITECTURES FOR SHA-1 AND SHA-2 CRYPTOGRAPHIC HASH FAMILIES

ATHANASIOU, GEORGE S., THEODORIDIS, GEORGE, GOUTIS, COSTAS E., MICHAIL, HARRIS E., KASPARIS, TAKIS

Journal:

Journal of Circuits System and Computers

Year:

2013

Language:

english

File:

PDF, 2.60 MB

english, 2013

41

A methodology for speeding up matrix vector multiplication for single/multi-core architectures

Kelefouras, Vasilios, Kritikakou, Angeliki, Papadima, Elissavet, Goutis, Costas

Journal:

The Journal of Supercomputing

Year:

2015

Language:

english

File:

PDF, 675 KB

english, 2015

42

[ACM Press the 17th great lakes symposium - Stresa-Lago Maggiore, Italy (2007.03.11-2007.03.13)] Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 - Compiler assisted architectural exploration for coarse grained reconfigurable arrays

Dimitroulakos, Gregory, Kostaras, Nikos, Galanis, Michalis D., Goutis, Costas E.

Year:

2007

Language:

english

File:

PDF, 132 KB

english, 2007

43

[ACM Press the 17th great lakes symposium - Stresa-Lago Maggiore, Italy (2007.03.11-2007.03.13)] Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 - Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path

Galanis, Michalis D., Dimitroulakos, Gregory, Goutis, Costas E.

Year:

2007

Language:

english

File:

PDF, 283 KB

english, 2007

44

[ACM Press the 4th international conference - Ischia, Italy (2007.05.07-2007.05.09)] Proceedings of the 4th international conference on Computing frontiers - CF '07 - A unified evaluation framework for coarse grained reconfigurable array architectures

Dimitroulakos, Gregory, Galanis, Michalis D., Kostaras, Nikos, Goutis, Costas E.

Year:

2007

Language:

english

File:

PDF, 492 KB

english, 2007

45

Speedups in embedded systems with a high-performance coprocessor datapath

Galanis, Michalis D., Dimitroulakos, Gregory, Tragoudas, Spyros, Goutis, Costas E.

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2007

Language:

english

File:

PDF, 304 KB

english, 2007

46

On the exploitation of a high-throughput SHA-256 FPGA design for HMAC

Michail, Harris E., Athanasiou, George S., Kelefouras, Vasilis, Theodoridis, George, Goutis, Costas E.

Journal:

ACM Transactions on Reconfigurable Technology and Systems

Year:

2012

Language:

english

File:

PDF, 3.14 MB

english, 2012

47

Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints

Kritikakou, Angeliki, Catthoor, Francky, Athanasiou, George S., Kelefouras, Vasilios, Goutis, Costas

Journal:

ACM Transactions on Architecture and Code Optimization

Year:

2013

Language:

english

File:

PDF, 1.11 MB

english, 2013

48

A scalable and near-optimal representation of access schemes for memory management

Kritikakou, Angeliki, Catthoor, Francky, Kelefouras, Vasilios, Goutis, Costas

Journal:

ACM Transactions on Architecture and Code Optimization

Year:

2014

Language:

english

File:

PDF, 1.44 MB

english, 2014

49

Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes

Kritikakou, Angeliki, Catthoor, Francky, Kelefouras, Vasilios, Goutis, Costas

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2013

Language:

english

File:

PDF, 1.02 MB

english, 2013

50

[IEEE IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON) - Salamanca, Spain (2015.9.8-2015.9.11)] IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON) - Hardware implementation of the Totally Self-Checking SHA-256 hash core

Michail, Harris E., Kotsiolis, Apostolis, Kakarountas, Athanasios, Athanasiou, George, Goutis, Costas

Year:

2015

Language:

english

File:

PDF, 311 KB

english, 2015

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